歡迎有誌於研究模擬射頻芯片和數字雷達算法芯片設計的同學加入。

課題組研究方向🙆🏿‍♀️：

毫米波/太赫茲相控陣雷達芯片、雷達算法芯片

低軌衛星與5/6G毫米波通信相控陣收發機芯片

新型模擬射頻MoS2芯片設計

高速ADPLL、FMCW-PLL和CDR電路設計

主要學術成果：

發表在包含行業頂級期刊TCAS-I/II和TMTT在內的50+篇論文：

集成電路總結： 2 TMTT ; 1 TCAS-I; 1 TCAS-II;3 RFIC; 1 CICC; 2 A-SSCC; 4 ESSCIRC☕️。

授權13項中國專利

教育背景：

2011年-2016年沐鸣娱乐，微電子學與固體電子學👨🏻‍🎓，博士
2007年-2011年上海交通大學，微電子學與固體電子學，學士

學術經歷：

2021年-至今沐鸣娱乐副教授
2018年-2021年沐鸣娱乐⌚️✉️，青年副研究員
2017年-2018年在沐鸣娱乐從事博士後工作，主要研究汽車毫米波雷達技術，毫米波成像技術
2016年-2017年在上海加特蘭微電子公司工作🪰，成為公司創始工程師🪳，設計77GHz毫米波汽車雷達產品📄，主要負責77GHzFMCW鎖相環和高性能放大器，已用於77GHz和60GHz量產芯片中🕞。
2012年-2014年在新加坡南洋理工VIRTUS LAB 工作，主要從事60GHz通信芯片設計

已發表期刊論文🙋🏻‍♂️： 

1. Z. Xu, B. Hu, T. Wu, Y. Yao, Y. Chen, J. Ren, S. Ma, “A 12-Bit 50 MS/s Split-CDAC-Based SAR ADC Integrating Input Programmable Gain Amplifier and Reference Voltage Buffer,” Electronics, vol. 11, no. 12, p. 1841, Jun. 2022. 

2. T. Wu, Z. Cao, Z. Xu, L. Dai, W. Mao, J. He, S. Ma, H. Yu, A 130-to-220-GHz Frequency Quadrupler with 80 dB Dynamic Range for 6G Communication in 0.13-μm SiGe Process. Electronics, vol. 11, no. 12, p. 825, Jun. 2022. 

3. T. Wu, X. Wang, Y. Chen, J. Ren, and S. Ma, “A 10MHz-to-50GHz Low-Jitter Multi-Phase Clock Generator for High-Speed Oscilloscope in 0.15-µm GaAs Technology,” Int. J. Circuit Theory Appl. (IJCTA)，vol. 50, no. 2, pp. 367-381, Feb. 2022. 

4. Y. Mao, T. Wu, Y. Chen, and S. Ma, “A 0.2-Terahertz Ceramic Relic Detection System Based on Iterative Threshold Filtering Imaging and Neural Network,” Electronics, vol. 10, no. 18, p. 2213, Sep. 2021. 

5. T. Wu, J. Wei, H. Liu, S. Ma, Y. Chen, and J. Ren, “A Sub-6G SP32T Single-Chip Switch with Nanosecond Switching Speed for 5G Applications in 0.25 μm GaAs Technology,” Electronics, vol. 10, no. 12, p. 1482, Jun. 2021.

6. S. Ma, T. Wu, X. Chen, Y. Wang, H. Tang, Y. Yao, Y. Wang, Z. Zhu, J. Deng, J. Wan, Y. Lu, Z. Sun, Z. Xu, A. Riaud, C. Wu, D. W. Zhang, Y. Chai, P. Zhou, J. Ren, W. Bao, “An artificial neural network chip based on two-dimensional semiconductor,” Sci. Bull., vol. 67, no. 3, pp. 270-277, 15 Feb. 2022. 

7. C. Ma, S. Ma, L. Dai, Q. Zhang, H. Wang and H. Yu, “Wideband and High-Gain D-Band Antennas for Next-Generation Short-Distance Wireless Communication Chips,” IEEE Trans. Antennas Propag., vol. 69, no. 7, pp. 3700-3708, July 2021. 

8. D. Wei et al., “Analysis and Design of a 35-GHz Hybrid π-Network High-Gain Phase Shifter With 360° Continuous Phase Shifting,” IEEE Access, vol. 9, pp. 11943-11953, 2021. 

9. S. Ma, T. Wu, J. Zhang and J. Ren, “A 5G Wireless Event-Driven Sensor Chip for Online Power-Line Disturbances Detecting Network in 0.25 μm GaAs Process,” IEEE Trans. Ind. Electron., vol. 68, no. 6, pp. 5271-5280, June 2021. 

10. J. Zhang, T. Wu, L. Nie, S. Ma, Y. Chen and J. Ren, “A 120–150 GHz Power Amplifier in 28-nm CMOS Achieving 21.9-dB Gain and 11.8-dBm Psat for Sub-THz Imaging System,” IEEE Access, vol. 9, pp. 74752-74762, 2021. 

11. M. Li et al., “A 6.94-fJ/Conversion-Step 12-bit 100-MS/s Asynchronous SAR ADC Exploiting Split-CDAC in 65-nm CMOS,” IEEE Access, vol. 9, pp. 77545-77554, 2021. 

12. S. Ma, T. Wu and J. Ren, “A Quadrature PLL With Phase Mismatch Calibration for 32GS/s Time-Interleaved ADC,” IEEE Access, vol. 8, pp. 219695-219708, 2020. 

13. S. Ma et al., “Analog Integrated Circuits Based on Wafer-Level Two-Dimensional MoS2 Materials With Physical and SPICE Model,” IEEE Access, vol. 8, pp. 197287-197299, 2020. 

14. S. Ma, H. Yu, Q. J. Gu and J. Ren, “A 5-10-Gb/s 12.5-mW Source Synchronous I/O Interface With 3-D Flip Chip Package,” IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 66, no. 2, pp. 555-568, Feb. 2019.

15. S. Ma, N. Li and J. Ren, “A 5-to-8-GHz Wideband Miniaturized Dielectric Spectroscopy Chip With I/Q Mismatch Calibration in 65-nm CMOS,” IEEE Trans. Very Large Scale Integr. (VLSI) Syst., vol. 26, no. 8, pp. 1554-1564, Aug. 2018.

16. S. Ma, H. Yu, Q. J. Gu and J. Ren, “A 7.52-dB Noise Figure 128.75–132.25-GHz Super-Regenerative Receiver With 0.615-fW√HzNEP by Coupled Oscillator Networks for Portable Imaging System in 65-nm CMOS,” IEEE Trans. Microw. Theory Techn., vol. 66, no. 9, pp. 4095-4107, Sept. 2018.

17. S. Ma, H. Yu and J. Ren, “A 32.5-GS/s Sampler With Time-Interleaved Track-and-Hold Amplifier in 65-nm CMOS,” IEEE Trans. Microw. Theory Techn., vol. 62, no. 12, pp. 3500-3511, Sep. 2014.

已發表會議論文：

1. D. Wei, T. Wu, S. Ma, and J. Ren, “A 35-to-50 GHz CMOS Low-Noise Amplifier with 22.2% -1-dB Fractional Bandwidth and 30.5-dB Maximum Gain for 5G New Radio,” in Proc. Eur. Solid State Circuits Conf. (ESSCIRC), Grenoble, France, Sep. 6-9, 2021.

2. S. Ma, T. Wu, J. Zhang and J. Ren, “A 151-to-173 GHz FMCW Transmitter Achieving 14 dBm Psat with synchronized Injection-Locked Power Amplifiers and Five in-Phase Power Combining Doublers in 65nm CMOS,” in Proc. IEEE Radio Freq. Integr. Circuits Symp. (RFIC), Philadelphia, PA, USA, June 2018, pp. 268-271.

3. S. Ma, J. Zhang, T. Wu and J. Ren, “A 35 GHz mm-Wave Pulse Radar with Pulse Width Modulated by SDM Realizing Sub-mm Resolution for 3D Imaging System,” in Proc. IEEE Radio Freq. Integr. Circuits Symp. (RFIC), Philadelphia, PA, USA, June 2018, pp. 261-263.

4. J. Zhang, T. Wu, L. Nie, S. Ma, Y. Chen, J. Ren, “A 3-to-78GHz Differential Distributed Amplifier with Ultra-Balanced Active Balun and Gain Boosting Techniques in 65-nm CMOS Process,” in Proc. IEEE Asian Solid-State Circuits Conf. (A-SSCC), Busan, Korea (South), Nov. 2021, pp. 1-3.

5. S. Ma, J. Sheng, N. Li and J. Ren, “A 7GHz-bandwidth 31.5 GHz FMCW-PLL with novel twin-VCOs structure in 65nm CMOS,” in Proc. IEEE Asian Solid-State Circuits Conf. (A-SSCC), Seoul, Korea (South), Nov. 2017, pp. 321-324.

6. D. Wei et al., “A 35 GHz Hybrid π-Network High-Gain Phase Shifter with 360° Continuous Phase Shift Range,” in IEEE MTT-S Int. Microw. Symp. Dig, Los Angeles, CA, USA, Aug. 2020, pp. 1311-1314.

7. J. Zhang, T. Wu, L. Nie, D. Wei, S. Ma and J. Ren, “A 20-30 GHz Compact PHEMT Power Amplifier Using Coupled-Line Based MCCR Matching Technique,” in IEEE MTT-S Int. Microw. Symp. Dig, Los Angeles, CA, USA, Aug. 2020, pp. 956-959.

8. X. Wang, S. Ma, B. Zhong and J. Ren, “SPICE Modeling and Verification of Wafer-Scale MoS2 Transistors,” in IEEE Int. Conf. on Solid-State & Integr. Circuit Technol. (ICSICT), Kunming, China, Nov. 2020, pp. 1-3.

9. J. Zhang, L. Nie, S. Ma and J. Ren, “A 10-18 GHz GaN Power Amplifier Based on Asymmetric Magnetically Coupled Resonator,” in IEEE Int. Midwest Symp. on Circuits and Syst. (MWSCAS), Springfield, MA, USA, Aug. 2020, pp. 802-805.

10. S. Ma, J. Lin, C. Ma and H. Yu, “A 140 GHz Transceiver for $4\times 4$ Beamforming Short-Range Communication in 65nm CMOS,” in IEEE Asia-Pac. Microw. Conf. (APMC), Singapore, Dec. 2019, pp. 1613-1615.

11. Y. Yao, J. Wei, M. Li, S. Ma, F. Ye and J. Ren, “A 256MHz Analog Baseband Chain with tunable Bandwidth and Gain for UWB Receivers,” in IEEE Int. Conf. on ASIC (ASICON), Chongqing, China, Oct. 2019, pp. 1-4.

12. T. Wu et al., “A 36–40 GHz VCO with bonding inductors for millimeter wave 5G Communication,” in IEEE Int. Conf. on ASIC (ASICON), Chongqing, China, Oct. 2019, pp. 1-4.

13. D. Wei, J. Zhang, T. Wu, S. Ma and J. Ren, “A 22-40.5 GHz UWB LNA Design in 0.15um GaAs,” in IEEE Int. Conf. on ASIC (ASICON), Chongqing, China, Oct. 2019, pp. 1-4.

14. Y. Yao et al., “SPICE Modeling and Simulation of High-Performance Wafer-Scale MoS2 Transistors,” in IEEE Int. Conf. on ASIC (ASICON), Chongqing, China, Oct. 2019, pp. 1-4.

15. J. Zhang, L. Nie, D. Wei, T. Wu, S. Ma and J. Ren, “A 130–150 GHz Power Amplifier for Millimeter Wave Imaging in 65-nm CMOS,” in IEEE Int. Conf. on ASIC (ASICON), Chongqing, China, Oct. 2019, pp. 1-4.

16. D. Wei et al., “A 140 GHz, 4 dB Noise-Figure Low-Noise Amplifier Design with the Compensation of Parasitic Capacitance CGS,” in IEEE Int. Midwest Symp. on Circuits and Syst. (MWSCAS), Dallas, TX, USA, Aug. 2019, pp. 299-302.

17. J. Wei, Y. Yao, L. Luo, S. Ma, F. Ye and J. Ren, “A Novel Nauta Transconductor for Ultra-Wideband gm-C Filter with Temperature Calibration,” in IEEE Int. Symp. on Circuits and Syst. (ISCAS), Sapporo, Japan, May 2019, pp. 1-4.

18. S. Ma, T. Wu, J. Zhang and J. Ren, “A 151-to-173 GHz FMCW Transmitter Achieving 14 dBm Psatwith synchronized Injection-Locked Power Amplifiers and Five in-Phase Power Combining Doublers in 65nm CMOS,” in IEEE Radio Freq. Integr. Circuits Symp. (RFIC), June 2018, pp. 268-271.

19. S. Ma, J. Zhang, T. Wu and J. Ren, “A 35 GHz mm-Wave Pulse Radar with Pulse Width Modulated by SDM Realizing Sub-mm Resolution for 3D Imaging System,” in IEEE Radio Freq. Integr. Circuits Symp. (RFIC), June 2018, pp. 261-263.

20. S. Ma, J. Sheng, N. Li and J. Ren, “A 7GHz-bandwidth 31.5 GHz FMCW-PLL with novel twin-VCOs structure in 65nm CMOS,” in Proc. IEEE Asian Solid-State Circuits Conf., Nov. 2017, pp. 321-324.

21. S. Ma, G. Zhou, J. Jiang, C. Chen, Y. Chen, F. Ye and J. Ren, “A Quadrature Clock Generator with Calibration for 22~31.4 GS/s Real-time Sampling System,” in Proc. Eur. Solid-State Circuits Conf. (ESSCIRC), Sep. 2015, pp. 136-139.

22. S. Ma, H. Yu, Y. Shang, W. Meng Lim and J. Ren, “A 131.5GHz, -84dBm Sensitivity Super-regenerative Receiver by Zero- phase-shifter Coupled Oscillator Network in 65nm CMOS,” in Proc. Eur. Solid-State Circuits Conf. (ESSCIRC), Sep. 2014, pp. 187-190.

23. S. Ma, F. Ye and J. Ren, “A 50–110 GHz Four-Channel Dual Injection Locked Power Amplifier with 36% PAE at 19 dBm PsatUsing Self-Start Technique in 65 nm CMOS Process,” in IEEE MTT-S Int. Microw. Symp. Dig. (IMS), June 2018, pp. 1449-1452.

24. Q. Li, S. Ma, F. Ye and J. Ren, “A low-Power PGA with DC-Offset Cancellation in 65 nm CMOS process,” in IEEE 13th International Conference on Solid-State and Integrated Circuit Technology (ICSICT), Oct. 2016, pp. 946-948.

25. S. Ma, S. Manoj, H. Yu, J. Ren and R. Weerasekera, “A 9.8 Gbps, 6.5 mW forwarded-clock receiver with phase interpolator and equalized current sampler in 65 nm CMOS,” in IEEE MTT-S Int. Microw. Symp. Dig. (IMS), May 2015, pp. 1-4.

26. S. Ma, N. Li, Fan Ye, Q. J. Gu and J. Ren, “A Wideband and Low Power Dual-Band ASK Transceiver for Intra/Inter-Chip Communication,” in IEEE MTT-S Int. Microw. Symp. Dig. (IMS), May 2015, pp. 1-4.

27. S. Ma, G. Zhou, N. Li, Fan Ye and J. Ren, “60GHz CMOS Coupled Oscillator Network by Zero-Phase-Shifters,” in IEEE 12th International Conference on Solid-State and Integrated Circuit Technology (ICSICT), Oct. 2014, pp. 1-3.

28. S. Ma, H. Yu and J. Ren, “An Overview of New Design Techniques for High Performance CMOS Millimeter-Wave Circuits,” in IEEE International Symposium on Integrated Circuits, Dec. 2014, pp. 292-295.

29. S. Ma, J. Wang, H. Yu and J. Ren, “A 32.5-GS/s Two- Channel Time-Interleaved CMOS Sampler with Switched-Source Follower based Track-and-Hold Amplifier,” in IEEE MTT-S Int. Microw. Symp. Dig. (IMS), Jun. 2014, pp. 1-3.

30. J. Wang, S. Ma, P. D. S. Manoj, M. Yu, R. Weerasekera and H. Yu, “High-speed and low-power 2.5D I/O circuits for memory-logic-integration by through-silicon interposer,” in IEEE International 3D Systems Integration Conference (3DIC), Oct. 2013, pp. 1-4.

31. S. Ma, W. Fei, H. Yu and J. Ren, “A 75.7GHz to 102GHz Rotary-traveling-wave VCO by Tunable Composite Right /Left Hand T-line,” in Proc. IEEE Custom Integr. Circuits Conf., Sep. 2013, pp. 1-4.

32. S. Ma, C. Chen, Y. Zhang and J. Ren, “A low power programmable band-pass filter with novel pseudo-resistor for portable biopotential acquisition system,” in Proc. IEEE APCCAS, Jan. 2012, pp. 232-235.

33. G. Zhou, S. Ma, F. An, N. Li, F. Ye and J. Ren, “A 30-GHz to 39-GHz mm-Wave low-power injection-locked frequency divider in 65nm CMOS,” in IEEE 11th International Conference on ASIC (ASICON), Nov. 2015, pp. 1-4.

34. Q. Chen, F. An, G. Zhou, S. Ma, F. Ye and J. Ren, “A 39GHz-80GHz Millimeter-Wave Frequency Doubler with Low Power Consumption in 65nm CMOS Technology,” in IEEE International Conference on ASIC (ASICON), Nov. 2015, pp. 1-4.

35. F. An, S. Ma, Q. Chen, G. Zhou, F. Ye and J. Ren, “A Wide-division-ratio 100MHz-to-5GHz Multi-Modulus Divider Chain for Wide-band,” in IEEE International Conference on ASIC (ASICON), Nov. 2015, pp. 1-4.

36. X. Liu, S. Ma, M. Yan, J. Ren and H. Yu, “A 5-GS/s, 13-mW, 2-channel time-interleaved asynchronous ADC in 65nm CMOS,” IEEE Int. RFIT, Taipei, 2016, pp. 1-3.

37. J. Wei, L. Luo, S. Ma, F. Ye and J. Ren, “A High Precision Bandgap Voltage Reference with MOS Transistor Curvature Compensation in 65-nm CMOS Process,” in IEEE 14th International Conference on Solid-State and Integrated Circuit Technology (ICSICT), Nov. 2018, pp. 1-3.

38. J. Zhang, T. Wu, S. Ma, Q. Hong, F. Ye and J. Ren, “A 8-12 GHz Vector-Sum Phase Shifter Using a Marchand Balun and Gilbert-Cell Structure,” in IEEE 14th International Conference on Solid-State and Integrated Circuit Technology (ICSICT), Nov. 2018, pp. 1-3.

已授權專利

1. 馬順利,吳天祥,許諾,曾超凡. “一種應用於飛行器的無空速管的空速計” ,中國發明專利，專利申請號CN202110184368.8，公告日2021年07月23日。

2. 馬順利,曾超凡,吳天祥,許諾. “一種水下航行器水流監測系統” ,中國發明專利，專利申請號CN202110185590.X，公告日2021年06月11日。

3. 馬順利,許諾,吳天祥,曾超凡. “一種大氣層內飛行器氣流監測系統”,中國發明專利🧑🏼‍🎓🤣，專利申請號CN202110185589.7💁‍♂️，公告日2021年06月04日🏠🤛🏼。

4. 馬順利; 姚玉婷; 任俊彥🦸，“一種可變增益和帶寬的模擬基帶電路”,中國發明專利，專利申請號202010577618.X，公告日2020年10月30日。

5. 馬順利; 吳天祥; 任俊彥，“一種具有層疊結構的多柵指數晶體管及其製備方法”，中國發明專利💇🏿，專利申請號202010281186.8🐞，公告日2020年9月1日。

6. 馬順利; 任俊彥; 吳天祥; 李寧; 葉凡➡️，“一種應用於毫米波通信系統的頻率源”🫲🏼，中國發明專利🏘，專利申請號201910022317.8，公告日2019年5月28日。

7. 馬順利; 任俊彥; 魏繼鵬; 李寧; 葉凡🤲🏻，“一種應用於毫米波無源成像的高增益接收機”🙇🏻‍♀️，中國發明專利，專利申請號201910022283.2，公告日2019年5月21日👷🏿‍♂️🤷🏼‍♀️。

8. 馬順利;任俊彥;魏繼鵬;李寧;葉凡🏊🏽‍♂️，“應用於5G毫米波基站的CMOS集成電路帶隙基準源”，中國發明專利，專利申請號201811616031.4➗，公告日2019年3月19日。

9. 馬順利;任俊彥;章錦程;李寧;葉凡，“應用於5G毫米波基站的四通道相控陣收發機”，中國發明專利👓，專利申請號201811614591.6🤽🏽‍♀️，公告日2019年3月15日。

10. 馬順利、陳嘉澍🧹，“放大器及其控製方法和信號處理系統”，中國發明專利，專利申請號201710097069.4📰，公告日2017年7月28日。

11. 馬順利、陳嘉澍🦨，“多模分頻器及其基本分頻單元”，中國發明專利，專利申請號201610886083.8，公告日2017年3月29日🫵🏿。

12. 任俊彥、魏東、馬順利、陳汧，“一種應用於太赫茲皮膚成像領域的CMOS集成電路太赫茲檢測器”👒， 中國發明專利，專利申請號CN201610309966.2👨🏽‍✈️，公告日2016年10月12日😐。

13. 任俊彥、馬順利🧑🏽‍🎓、魏東、陳汧，“一種應用於太赫茲皮膚成像領域的CMOS集成電路太赫茲源”🎄， 中國發明專利，專利申請號CN201610318871.7，公告日2016年10月12日。

參與的項目：

上海市 “科技創新行動計劃”自然科學基金面上項目，基於先進CMOS工藝的5G毫米波頻段多通道收發機芯片研究，在研🏋🏼‍♀️，主持

國家自然科學基金青年科學基金項目🙍🏼，基於先進CMOS工藝的1-30GHz超寬帶N-path濾波器研究，在研🫧⚈，主持

中電科24所、36所、50所橫向合作，在研，主持

國家自然科學基金委員會🕙，重點項目，超寬帶CMOS毫米波頻譜檢測芯片關鍵技術✉️，在研🦹‍♀️，參加

中華人民共和國科學技術部，國家重點研發計劃🏄🏼‍♀️，全在一芯片集成工藝🧙‍♂️，在研👨🏻‍🔧，參加

中華人民共和國科學技術部🥒，國家重點研發計劃，高精度毫米波/太赫茲雷達與成像芯片技術，在研🛴，參加

國家自然科學基金應急管理項目，適合太赫茲成像的CMOS太赫茲輻射源研究🔁，已結題🧜🏻‍♂️，參與

國家自然科學基金面上項目，適於生態型毫米波系統集成的納米CMOS頻率綜合方法研究，已結題🦹🏽‍♀️🚶，參與

浦東新區科技發展基金🛑，面向智能交通的ADAS芯片，已結題，參與